1. Field of the Invention
The present invention relates generally to metrology, and more particularly to electron beam metrology in the semiconductor manufacturing and microfabrication industries.
2. Description of the Background Art
Fabrication of semiconductor devices such as logic and memory devices typically includes a number of processes that may be used to form various features and multiple levels or layers of semiconductor devices on a surface of a semiconductor wafer or another appropriate substrate. For example, lithography is a process that typically involves transferring a pattern to a resist arranged on a surface of a semiconductor wafer. Additional examples of semiconductor fabrication processes may include chemical-mechanical polishing, etch, deposition, ion implantation, plating, and cleaning. Semiconductor devices are significantly smaller than a typical semiconductor wafer or substrate, and an array of semiconductor devices may be formed on a semiconductor wafer. After processing is complete, the semiconductor wafer may be separated into individual semiconductor devices.
Semiconductor fabrication processes, however, are among the most sophisticated and complex processes used in manufacturing. In order to perform efficiently, semiconductor fabrication processes may require frequent monitoring and careful evaluation. In particular, many dimensional aspects of these fabrication processes must be carefully controlled, such as line or space widths, hole dimensions or areas, rounding of corners, or shrinkage of line ends. Semiconductor fabrication processes may introduce a number of deviations from these desired dimensions into a semiconductor device. As an example, variations in lithographic exposure levels may cause deviations in printed line widths. Such deviations may adversely affect the performance of the process to an extent that overall yield of the fabrication process may be reduced below acceptable levels. Therefore, extensive monitoring and evaluation of semiconductor fabrication processes may typically be performed to ensure that the process is within design tolerance and to increase the overall yield of the process. Extensive monitoring and evaluation of the process may take place both during process development and during process control of semiconductor fabrication processes.
As the dimensions of semiconductor devices continue to shrink with advances in semiconductor materials and processes, the ability to examine microscopic features and to detect dimensional deviations has also become increasingly important to the successful fabrication of semiconductor devices. Significant research has been focused on increasing the throughput and utility of metrology and/or inspection tools used to examine microscopic features and dimensions. There are several disadvantages, however, in using the currently available methods and systems for metrology and/or inspection of specimens fabricated by semiconductor fabrication processes. For example, testing time and process delays associated with measuring and/or inspecting a specimen may increase the overall cost of manufacturing and the manufacturing time for fabricating a semiconductor device. For example, process tools may often be idle while metrology and/or inspection of a specimen is performed such that the process may be evaluated before additional specimens are processed thereby increasing manufacturing delays. Furthermore, if processing problems cannot be detected before additional wafers have been processed, wafers processed during this time may need to be scrapped, which increases the overall cost of manufacturing.